High-Speed SI and PI Design:三建技術課程(培訓中心)

課程資訊

開課日期

2025-06-19

學習時程

09:00-12:00

上課時間

週四

上課時段

上午

適用對象

．本課程由經濟部產業發展署「半導體國際連結創新賦能計畫」指導辦理，參訓對象為從事 IC 設計、IC 製造、IC 封裝測試等相關領域的企業人員。
．每家企業最多可報名4名人員。
．主辦單位保留參訓資格審核及最終錄取的權利。

課程特色

High-Speed SI and PI Design and Analysis in AI High-Bandwidth Applications（實體課）
In recent years, due to the compactness of high-speed digital systems, the layout space on printed circuit boards (PCBs) has become increasingly constrained. As a result, the spacing between PCB traces has narrowed significantly, leading to severe interference between signal lines. Furthermore, as the speed of digital signals increases, these interferences become even more critical. The main sources of such interference include crosstalk between traces, common-mode noise in differential transmission lines, and via-induced noise in multilayer PCBs. The following sections discuss the generation and mitigation methods for each type of noise.

詳細內容

1. Generation and Mitigation of Crosstalk
1-1. Causes of Crosstalk
1-2. Crosstalk Coupling Models
1-3. Methods to Eliminate Crosstalk:
．Impedance matching design
．High-speed signal routing guidelines
．Guard traces
．Ground vias and decoupling capacitors
2. Generation and Mitigation of Common-Mode Noise in Differential Transmission Lines
2-1. Causes of Common-Mode Noise in Differential Pairs
2-2. Differential Transmission Line Models
2-3. Methods to Eliminate Common-Mode Noise:
．Capacitive compensation
．Inductive compensation
．Balanced structures
3. Generation and Mitigation of PCB Via Noise
3-1. Causes of Via Noise in PCBs
3-2. Basic PCB Structure
3-3. Via Impedance Matching and Signal Integrity Analysis
3-4. Near-End and Far-End Crosstalk Noise
3-5. Generation and Mitigation of Signal Loss